For your second lab (and probably onwards), CS and EC students will be working on separate lab exercises. The CS students' inclination is on the study of computer architecture through softwares/programming while the EC people will do computer architecture simulation/implementation using hardware description languages.
For CS:
Lab 02 - Designing Simple Circuits. [Download Manual]. Submit Lab output individually.
For EC:
- Vios will have her separate task - an introduction to VHDL. [Click here to download]. Email your vhdl code output.
- Gerodias, Baul & Jimenez will implement (individually) Lab02 - Combinational CPU components. You can collaborate among yourselves and share ideas. But individual submission of lab output is needed. Email your vhdl code output.
Xilinx Resources:
1. ISE 9
2. ISE 8
Instructor's email: stephenhaim(at)yahoo(dot)com(ph)
Deadline: Next Thursday, Dec. 4, 2008
Enjoy!
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